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Fresher VLSI design Resume Sample

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Biodata

Name of the Candidate:[Private]
Name of the Post Applied:VLSI design
Job related skills / software:digital electronics, verilog HDL, cadence,xilinx
Category:Miscellaneous
Sub Category:Miscellaneous
Years of Experience:0 years
State:Maharashtra
Gender:Female
Salary Expected per Month(Rs):40,000 to 50,000
Highest Qualification attained:mtech
Major / Specialization:vlsi
Email Id:[Private]
 
Are you looking for job now?:Yes
Can the recruiter contact you?:Yes
Sponsored Links:

Resume Format / CV Sample Template / Example / Model :

    

Summary

Dynamic and Career-Oriented engineering professional, lookingforaresponsiblepositionasaVLSIdesignengineerwithaviewto utilize and enhance my skills and experience towardsprofessionalgrowth.

Experience

  Intern

BitMapperIntegrationTechnologiesPvt.Ltd

Aug2020-Dec2020(5months)

HandsonexperienceonSchematicDesign(CadenceVirtuoso),RTLCoding(XilinxISE,XilinxVivado,QuestaSim)aswell as Hardware Design and Testing, Project SpecificationAnalysis,PartitioningandDesigningetc

 

Education

  ShriGuruGobindSinghjiInstituteofEngineeringandTechnology,Vishnupuri,Nanded

MasterofTechnology-MTech,EmbeddedSystem&VLSI-CGPA:8.04

2019-2021

Project1: DesignofanAreaefficientBraunmultiplierusing parallel prefix adder.

The circuit complexity mainly depends on the multiplication count required for developing the system. Braun  multiplier is the solution for achieving high execution speed demands. A conventional Braun multiplier is designed by using  an array of 16 AND gates, 9 Full Adders, and a ripple carry adder (RCA) in the final stage. It is designed in cadence Virtuoso tool for 180nm technology with 1.8V source. It is observed that the area reduces by 258 transistors and delay is decreased by 4.65 ns.

 

Project2:Synchronous8-Bitup-downCounterusing  CadenceVirtuoso.

                           The project was to design a 8-bit up-down counter with appropriate flip flop in cadence.   

                          It provided a great opportunity to work in cadence and to build all the basic building blocks. The performance of the counter was checked for different loads and different characteristic parameters like rise time, fall time and propagation delay were measured for different loading effects.

 

Project3:DesignofDFlipFlopusingCMOS180nmTechnologyusing Cadence.

CMOS 180nm technology is used to implement D latches and flip-flops by using cadence      virtuoso tool and compared various D latches and flip-flops on the basis of power dissipation.

The D flip-flop is by far the most important of the clocked flip-flops as it ensures that inputs S and R are never equal to one at the same time. The D flip flop is constructed from a gated SR flip-flop with an inverter added between the S and R inputs to allow for a single D (data) input.

 

 

  SinhgadInstituteofTechnology&Science

BachelorofEngineering-BE,ElectronicsandTelecommunication-Percentage:66.13%

2015-2018

Project1:Home AutomationbyusingAndroidApplication.

The application of smart home concept improves the standard of living. The main control system implements wireless Bluetooth of Home Automation System (HAS) with wireless remote control which controls electrical appliances and devices in homes with a low cost design. This system is designed to assist and provide support in order to fulfill the needs of elderly and technology to provide remote access from Android smart phone.

 

Project2:WirelessPowerTransmissionbyusingClass-EAmplifier

The transmission of electrical energy from source to load for a distance without any conducting wire or cables is called Wireless Power Transmission. In this project renewable energy has been used as the source. As the output from the renewable energy sources is low,  we used a suitable step-up converter. The DC output voltage from the solar cell is boosted using a high step-up converter and it is converted to oscillating signals. The input of 12V has been stepped up to 230V, high frequency and given as a input to the transmission coil. The electrical energy gets transferred from transmitter coil to receiver coil due to magnetic resonance between them. The secondary or the receiver coil gives 12v dc output voltage to load, which drives 12v dc motor fan.

 

 

 

  GovernmentResidentialWomen'sPolytechnic

Diploma,ElectronicsandCommunication-Percentage:75.65%

2012-2015

 

Skills

c•cadence•digitalelectronics•embeddedc•verilog•RTLDesign•ElectronicsHardwareDesign•Proteus•Keil•Xilinx

Summary

Dynamic and Career-Oriented engineering professional, lookingforaresponsiblepositionasaVLSIdesignengineerwithaviewto utilize and enhance my skills and experience towardsprofessionalgrowth.

Experience

  Intern

BitMapperIntegrationTechnologiesPvt.Ltd

Aug2020-Dec2020(5months)

HandsonexperienceonSchematicDesign(CadenceVirtuoso),RTLCoding(XilinxISE,XilinxVivado,QuestaSim)aswell as Hardware Design and Testing, Project SpecificationAnalysis,PartitioningandDesigningetc

 

Education

  ShriGuruGobindSinghjiInstituteofEngineeringandTechnology,Vishnupuri,Nanded

MasterofTechnology-MTech,EmbeddedSystem&VLSI-CGPA:8.04

2019-2021

Project1: DesignofanAreaefficientBraunmultiplierusing parallel prefix adder.

The circuit complexity mainly depends on the multiplication count required for developing the system.


Braun  multiplier is the solution for achieving high execution speed demands. A conventional Braun multiplier is designed by using  an array of 16 AND gates, 9 Full Adders, and a ripple carry adder (RCA) in the final stage. It is designed in cadence Virtuoso tool for 180nm technology with 1.8V source. It is observed that the area reduces by 258 transistors and delay is decreased by 4.65 ns.

 

Project2:Synchronous8-Bitup-downCounterusing  CadenceVirtuoso.

                           The project was to design a 8-bit up-down counter with appropriate flip flop in cadence.   

                          It provided a great opportunity to work in cadence and to build all the basic building blocks. The performance of the counter was checked for different loads and different characteristic parameters like rise time, fall time and propagation delay were measured for different loading effects.

 

Project3:DesignofDFlipFlopusingCMOS180nmTechnologyusing Cadence.

CMOS 180nm technology is used to implement D latches and flip-flops by using cadence      virtuoso tool and compared various D latches and flip-flops on the basis of power dissipation.

The D flip-flop is by far the most important of the clocked flip-flops as it ensures that inputs S and R are never equal to one at the same time. The D flip flop is constructed from a gated SR flip-flop with an inverter added between the S and R inputs to allow for a single D (data) input.

 

 

  SinhgadInstituteofTechnology&Science

BachelorofEngineering-BE,ElectronicsandTelecommunication-Percentage:66.13%

2015-2018

Project1:Home AutomationbyusingAndroidApplication.

The application of smart home concept improves the standard of living. The main control system implements wireless Bluetooth of Home Automation System (HAS) with wireless remote control which controls electrical appliances and devices in homes with a low cost design. This system is designed to assist and provide support in order to fulfill the needs of elderly and technology to provide remote access from Android smart phone.

 

Project2:WirelessPowerTransmissionbyusingClass-EAmplifier

The transmission of electrical energy from source to load for a distance without any conducting wire or cables is called Wireless Power Transmission. In this project renewable energy has been used as the source. As the output from the renewable energy sources is low,  we used a suitable step-up converter. The DC output voltage from the solar cell is boosted using a high step-up converter and it is converted to oscillating signals. The input of 12V has been stepped up to 230V, high frequency and given as a input to the transmission coil. The electrical energy gets transferred from transmitter coil to receiver coil due to magnetic resonance between them. The secondary or the receiver coil gives 12v dc output voltage to load, which drives 12v dc motor fan.

 

 

 

  GovernmentResidentialWomen'sPolytechnic

Diploma,ElectronicsandCommunication-Percentage:75.65%

2012-2015

 

Skills

c•cadence•digitalelectronics•embeddedc•verilog•RTLDesign•ElectronicsHardwareDesign•Proteus•Keil•Xilinx

 

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