Resume  :
	Snehal R. Patil
	BE (Electronics and Telecommunication Engineering)
	snehalpatil.mail AT gmail.com
	
	CAREER OBJECTIVE :
	To pursue a successful career which nurtures professional growth, rewards innovation, values integrity and acknowledges hard work.
	
	ACADEMIC PROFILE :
	PGDiploma VLSI Design CDAC’s Advanced Computing Training School,Aundh,Pune 2015 72.50%
	BE Electronics and Telecommunication Engineering D.N.Patel College of Engineering,Shahada N.M.U 2014 69.86%
	Diploma Industrial Electronics G.M.C.Polytechnic,Shahada M.S.B.T.E 2011 84.91%
	S.S.C General S.A.M.English Medium School,Shahada NASIK 2008 85.69%
	
	ACADEMIC PROJECTS  :
	Title  : Implementation of Template Matching Algorithm on FPGA
	Platform  : VLSI Design Duration: 1 Month
	Description  : Template matching algorithm is used for object recognition in image processing. Where correlation between template image which is extracted from input image and the input image is calculated. This algorithm is implemented on FPGA, to take advantage of the parallelism, low cost and power consumption. The algorithm is tested on still image which can further extended for real time image captured from OV7670 CMOS camera. For coding Verilog HDL language and results are verified using MATLAB.
	
	Title  :Pick and Place Robotic arm
	Platform  :Automation PLC based Duration: 3 Months
	Description  :Pick and Place Robotic Arm is a project based on PLC.Robotic arm is used to pick an object from one location and place it on another location.PLC model DVP10SX11R/T is used and Ladder Logic Diagram is used for programming PLC.
	
	Title  : Dam Sutter Control using Microcontroller
	Platform  :Embedded System Design Duration: 3 Months
	Description  : Dam shutter control using micro-controller is a project which detects the water level of the dam and accordingly opens the dam shutter in steps.It also delivers voice message about the water level.
			
 We used assembly language for programming 8051 micro-controller.
	
	PERSONAL SKILLS :
	Strengths  : Strong analytical skills, Team player, quick to learn new things and ability to ask right questions, VHDL, Verilog, CMOS VLSI Design, C, C++, System Architecture, Digital Design, Linux, Shell Scripting, Perl.
	
	PERSONAL PROFILE :
	Name  : Snehal Patil
	Father Name  : Rajaram Patil
	Date of Birth  : 22-04-1992
	Marital Status  : Married
	Nationality  : Indian
	Languages Known  : English, Hindi, Marathi and Gujarathi
	Hobbies  : Reading Books
	
	DECLARATION :
	I hereby declare that the information and facts stated above are true and correct to the best of my knowledge and belief.
	
	Place  : Pune
	
	(Snehal R.Patil)