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Fresher Engineering Lecturer Resume Sample

Ravada Bhaskara Rao
Mobile : +7382250504
E-Mail : Baskar.ravada AT gmail.com

Address for Correspondence :
S/O sanyasi appala naidu
s.kota talari village,
s.kota mandal,
viziayanagaram Dist
Andhra Pradesh.
PIN-535148.

Personal Data :
Date of Birth :08-12-1991
Gender :Male
Nationality : Indian
Marital Status : Single
Languages Known : Telugu, English

Objective  :
Looking forward to take up a challenging position for the reputed organization, which offers good work environment, continuous learning and growth opportunities.

Academic Record  :
M.Tech in 80% 2016 (sep) Lakireddy Balireddy college of Power electronic engineering. and Drives Mylavaram.
B.Tech in 70.74% 2013 Bhimavram college of eng&Tech. Electrical and JNTU-k. Electronics Engineering
XII STD 89.20% 2009 Chaitanya Junior college Srungavarapukota.
X STD 79.0% 2006 Ramakrishna high school, Srungavarapukota.

Programming Language : Basics of C

Areas of Interest  :
** Power electronics.
** Control System.
** Electrical Drives.

Tools known :
** MATLAB/Simulation
** Hands on NI LABVIEW and XILINX

Achievements :
** Qualified in GATE ( 2014) in Electrical Engineering.
** I have scored distinction marks throughout my career.
** Published paper in international journal of Power electronics and drives.

Competences :
** Hard working and Self learning nature.
** Adaptable to different working conditions.
** Ability to work with team.
** Problem solving ability.

Academic Projects :
Title : “A SINGLE PHASE GRID CONNECTED PHOTOVOLTAIC MICROINVERTER WITH SOFT-SWITCHING FLYBACK CONVERTER AND NEW TOPOLOGY INVERTER
Environment : MATLAB/SIMULINK

Project Description : This project presents an unprecedented single-phase microinverter for a grid-connected PV system.


The proposed microinverter consists of an isolated step up dc–dc converter using an active-clamp circuit with a series resonant voltage doubler and inverter with single-switch-modulation buck converters.

The output current of the inverter stage is controlled by following a sinusoidal reference with the angle being extracted from the grid and MPPT control algorithm. In the operation of inverter, the input voltage Vd of the inverter stage is constantly controlled by the dc-dc stage at higher value than peak grid voltage.

Title : “FIVE LEVEL INVERTER TOPOLOGY WITH FPGA BASED PULSE GENERATION”
Environment : HARDWARE
Project Description :In this project a five level inverter topology with less number of switches is implemented on PCB using IRF540N MOSFETS .Also Digital pulses are used to trigger the switches rather than Analogy pulses.PWM pulses are generated by developing software code using Xilinx tool box in matlab/simulink. spartan 3E FPGA board is used to test the pulses. The effective implementation of the proposed work is demonstrated through the results.

Co Curricular Activities :
Participate blood donation camp

Subjects can teach :
1. power electronics.
2. Electrical machines.
3. Control Systems.
4. Power Systems.
5. Electrical Measurements.
6.Electrical Networks.
7. Drives.

Declaration :
I hereby declare that the above-mentioned information is correct up to my knowledge and I bear the responsibility for the correctness of the above-mentioned particulars.

Place :
Date  :