Biodata |
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Name of the Candidate | : | [Private] |
Name of the Post Applied | : | ASIC/SOC Verification Engineer |
Job related skills / software | : | Digital Electronics, Verilog-HDL, System Verilog, ,C(Basics), Gain Enhancement of EDFA Amplifier using Amplified Spontaneous Emission Reinjection |
Category | : | Design Engineering |
Sub Category | : | Electronics Design/ VLSI Engineer |
Years of Experience | : | 0 years |
State | : | Uttarakhand |
Gender | : | Male |
Salary Expected per Month(Rs) | : | 30,000 to 40,000 |
Highest Qualification attained | : | M.Tech. : Master of Technology |
Major / Specialization | : | Digital Communication |
Email Id | : | [Private] |
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Are you looking for job now? | : | Yes |
Can the recruiter contact you? | : | Yes |
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MOHAMMAD YUSUF
Kichha, U. S. Nagar Uttarakhand
Email - ysiddiqui48 AT gmail.com
OBJECTIVE :
To work in an organization where I can utilize my knowledge and keep learning new skills while working towards fulfilling organizational goals.
ACADEMIC DETAILS :
** M. Tech (Digital Communication) Uttarakhand Technical University 2019 81.54
** B. Tech (Electronics and Telecommunication) Uttarakhand Technical University 2016 68.16
** Intermediate C.B.S.E. 2012 62.8
** High School C.B.S.E 2010 68
PROJECT :
** Gain Enhancement of EDFA Ampliï¬er using Ampliï¬ed Spontaneous Emission Reinjection
** To enhance the gain of the C-band erbium doped ï¬ber ampliï¬er using the forward and backward ampliï¬ed spontaneous noises. Also the work has been done on eliminating some components such as pump to decrease the cost of the system.
ACTIVITIES :
** Participated in the Faculty Development Programme on "Robotics and Embedded Systems " conducted by the Electronics and ICT Academy, IIT Roorkee from 2 Apr-6 Apr, 2019
** Participated in the Faculty Development Programme on "VLSI Testing" conducted by the Electronics and ICT Academy, IIT Roorkee from 26 Apr-28Apr, 2019.
** Successfully completed the "Machine Learning" Online Certiï¬cation Course conducted by NPTEL of 8 Weeks.
Published a review paper entitled "A Review Paper on MIMO Based OFDMA System in Digital Communication System" in IARJSET journal with Impact Factor 5.509
** Participated in One week short term course on " Emerging Trends in Wireless Communication and Signal Processing" at NIT kurukshetra from 7 Jan-12Jan, 2019
** Participated in the Faculty Development Programme on "Digital Image Processing using MATLAB" conducted by the Electronics and ICT Academy, IIT Roorkee from 18 Feb-22Feb, 2019
** Published a research paper entitled “Enhancement in the Gain of EDFA in Fibre Optic Communication” in International Journal of Engineering and Advanced Technology (IJEAT) with impact factor 5.97, in Volume-9, Issue-2, December 2019, Page No. 411-417
** I have 30 days industrial Summer training Experience in Broadband Communication from BSNL (Bharat Sanchar Nigam Limited), Rudrapur (Uttarakhand).
KEY SKILLS :-
Digital Electronics, Verilog-HDL, System Verilog, ,C(Basics)
PERSONALPROFILE :
Date of Birth :11/09/1995
Nationality :Indian
LanguagesKnown : English, Hindi,Urdu
DECLARATION :
I hereby declare that the above mentioned information are true to the best of my knowledge.
DATE :
PLACE :
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