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Fresher VLSI Designer Resume Sample

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Name of the Candidate:[Private]
Name of the Post Applied:VLSI Designer
Job related skills / software:VHDL Programming , Home Automation Control System Using DTMF, VLSI System, FPGA ,Verilog HDL ,MATLAB
Category:Design Engineering
Sub Category:Electronics Design/ VLSI Engineer
Years of Experience:0 years
State:Gujarat
Gender:Male
Salary Expected per Month(Rs):Negotiable
Highest Qualification attained:M.Tech. : Master of Technology
Major / Specialization:Electronics & Communications (VLSI)
Email Id:[Private]
 
Are you looking for job now?:Yes
Can the recruiter contact you?:Yes
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Resume Format / CV Sample Template / Example / Model :

    

RESUME :
Name  :Chaudhari Suhas Hasmukhbhai
Address  : 38-Majumnagar society.
Megharaj Road, Modasa
Dist  :-Sabarkhantha, Gujarat
Pin Code  :- 383315
State-Gujarat (India)

E-mail  :chaudharisuhas94 AT yahoo.com
Mobile no.  : 9428773134

Career objective :
To work in a challenging and dynamic environment and to keep adding value to the organization that I represent and serve, and to myself, while concurrently upgrading my skills and knowledge.

Personal details :
Birth date  :12 July, 1990
Gender  :Male
Nationality  :Indian
Marital status  :Unmarried
Mother tone  :Gujarati
Language known  : Gujarati, Hindi, English
Religion  :Hindu
Hobby  :Reading, Sports

Educational qualifications  :
S.S.C (10th) G.S.E.B 58.43
H.S.C (12th science) G.H.S.E.B 60.50

Graduation  : B.E Electronics & Communication Engineer
Institute  : L.C Institute of technology, Bhandu Mehsana (Gujarat)
University  : HemchandracharyaNorth Gujarat University Patan (Gujarat)
B.E B.E. E&C 6th sem 553/900 61.44
B.E. E&C 7th sem 542/900 60.22
B.E. E&C 8th sem 303/400 75.75
Aggregate percentage of final year is 65.00% .

Project Details :
H


ome Automation Control System Using DTMF(8th sem).
VHDL Programming (6th sem).

Industrial visit :
Hi-ral electronics, Gandhinagar.
ISRO, Ahmadabad.

Training Attended :
I have got training at Tata Teleservices Limited in OSP, Transport, Data & Switch department for (6thmonth) in final semester.

Other co-curricular  :
Participated in Robotics[S1] at our collage.
Participate in Robo war at AIT, Ahmadabad.
Participated in Robotics workshop at BITCollege (Baroda).

Post-Graduation  :
M-Tech in VLSI System (Pacific University Udaipur Rajasthan).
Percentage  :- (1-year 69%) awaited final result.
Project title (M-Tech)  : Earth Mover's Distance
Resources  : FPGA ,Verilog HDL ,MATLAB.
Experiences  :- 2 year 1 months teaching experiences in Grow More Faculty of Engineering Collage.

Technical skill set :
Basic knowledge about networking in (CCNA(R&S) Cisco Certified Network Associate.

Practical knowledge  :- (LAN,WAN,ROUTING,TELNET,VLAN).

In this course completed Networks Nuts in Ahmadabad & 3-months duration.

Languages  : Programming in c, VHDL, Verilog HDL Coding,
Operating Systems  : Window 98, 2000 Server, XP, Vista, Linux
Other Skills  : Digital Design, Verilog Design.

Declaration :
I here by certify that all the above information submitted by me is true and correct to the best of my knowledge and belief.

Signature :
Chaudhari Suhas H.

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