Biodata |
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| Name of the Candidate | : | Ravikumar |
| Name of the Post Applied | : | VLSI Designer |
| Job related skills / software | : | ASIC Design and Verification,Testing of VLSI Circuits, Physical Design |
| Category | : | Design Engineering |
| Sub Category | : | Electronics Design/ VLSI Engineer |
| Years of Experience | : | 0 years |
| State | : | Telangana |
| Gender | : | Male |
| Salary Expected per Month(Rs) | : | 25,000 to 30000 |
| Highest Qualification attained | : | B.Tech. : Bachelor of Technology |
| Major / Specialization | : | VLSI Design |
| Email Id | : | ravi.bayri AT gmail.com |
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| Are you looking for job now? | : | Yes |
| Can the recruiter contact you? | : | No |
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RAVIKUMAR.B
Email : ravi.bayri AT gmail.com
Phone : +91-8106692607
CAREER OBJECTIVE :
Apply my skills in a creative way at challenging environment for a company focused on quality, dedication,and ingenuity.
ACADEMIC DETAILS :
** B.Tech in College of Engineering from JNTUH University, Electronics & Communication Department (2017)
** Diploma in college of Engineering from SBTET Board, Electronics & Communication Department (2014)
** SSC in School of NVTS- (2009)
AREA OF INTEREST :
** ASIC Design and Verification
** Physical Design
ACADEMIC PROJECTS :
Title : Design and Implementation of DCT algorithm by using Verilog HDL
Description :Discrete Cosine Transform is widely used in image compression. it is describes the FPGA implementation of a two dimensional (8×8) point Discrete Cosine Transform processor with Verilog HDL for application of image processing. The row-column decomposition algorithm and pipelining are used to produce the high quality circuit design with the max clock frequency. The complete design implemented by using Xilinx12.1i.
Title : An Automated and Wireless Prevention System for Railways
Description : This project includes two modules.
First module is implemented at railway station side; Second module is implemented at train side. First module is implemented with RF receiver, gate opening closing and opening, virtual platform designing. Second module is designed with IR setup, RF transmitter and motor which shows train engine section by using Keil & ISIS software for Design and Verification.
Title : Two Way Intercom Processor & PCB Designing
Technical Skils :
Languages :Basics of C, Java
Simulation Tools :Xilinx-ISE, Keil&Matlab
Technologies : Vlsi, Embedded,PCB design, Circuit design
Operating system : WINDOWS
Achievements :
** Selected in Campus placement drive during under graduation
** Active in Participation Sports (Cricket)
Personal Details :
NAME : Ravikumar.B
Father Name : Sahadeva.B
DOB : 4th May 1994
Nationality :Indian
Hobbies : Hearing music, Play Cricket
Languages Known : English, Telugu & Hindi
DECLARTION :
I hereby declare that the above information are true to best of my knowledge and own belif.
DATE :
PLACE :
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